Hernández Ortega AG, Avella Rivera BS, Vera OF, Bareño Quintero JO. An in-depth-examination: comparative analysis of multiplication hardware accelerator algorithms in VHDL for 8-Bit Systems (WTM),(PBM) and (BWM) synthesized on an ALTERA-CYCLONE-II-DE1-Board. ing. Solidar [Internet]. 2024 May 7 [cited 2025 May 8];20(2):1-29. Available from: https://revistas.ucc.edu.co/index.php/in/article/view/5061