Hernández Ortega, A. G., Avella Rivera, B. S., Vera, O. F., & Bareño Quintero, J. O. (2024). An in-depth-examination: comparative analysis of multiplication hardware accelerator algorithms in VHDL for 8-Bit Systems (WTM),(PBM) and (BWM) synthesized on an ALTERA-CYCLONE-II-DE1-Board. Ingeniería Solidaria, 20(2), 1-29. https://doi.org/10.16925/2357-6014.2024.02.10